ML ASIC Performance Modelling Intern

Job Title: ML ASIC Performance Modelling Intern    Job Location: San Jose, CA    Job ID: AI2384  Internship Term: preferably starting in January 2025 through June 2025.
 
Internship Stipend: The hourly pay rate range for this position is $43 - $45  
 
Roles and Responsibilities:  As a member of the Platform Architecture team, you will be working on using your knowledge of computer architecture to model our Machine Learning Accelerator to perform coarse modeling of the power, performance and area of the MLA for different configurations of the MLA as well as for different ML workloads like LLMs and VLMs. We are looking for a dynamic computer architecture intern with a background in computer architectures for this position. We are looking for candidates who are about to complete their Master's or PhD or who have already completed their Master's or PhD.  Requirements (Experience and Expertise Areas):  

Must-have:  
Pursuing MS or PhD in Computer ArchitectureThorough knowledge of coding with Python and C++

Highly desirable:  
Strong understanding of machine learning architecture like systolic arrays.Can-do attitude; Curious, creative, and good at solving problems; Execution and results oriented; Self-driven; Thinks Big and is highly accountable; Good communication skills.
EEO Employer: SiMa is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.