Kernal Driver Software Engineer
Cupertino
Etched
Transformers etched into silicon. By burning the transformer architecture into our chips, we're creating the world's most powerful servers for transformer inference.Job Summary:
We are seeking a highly skilled and motivated Kernel Driver Developer to join our team. We’re building Sohu, the world’s first transformer ASIC that leverages tight hardware-software co-design to deliver world-best performance. Kernel developers at Etched focus on the development and optimization of kernel-mode drivers for our cutting-edge ML accelerator devices. This role centers on crafting efficient, reliable, and high-performance drivers running within modern server environments. You will play a crucial role in bridging the gap between hardware and software, ensuring our ML accelerators deliver maximum performance for demanding AI workloads, especially within virtualized environments.
Key Responsibilities:
Kernel-Mode Driver Development: Design, develop, and maintain kernel-mode drivers ensuring high reliability, informative debug, and optimal performance.
Performance Optimization: Analyze and optimize driver performance for demanding AI workloads, focusing on minimizing latency and maximizing throughput.
Hardware Integration and Co-Design: Collaborate closely with hardware engineers throughout the ASIC design process..
Virtualization Support: Implement driver support for device virtualization technologies, including SR-IOV, VFIO, and para-virtualization.
Memory Management: Implement efficient memory management strategies considering kernel memory mapping, page tables configuration, NUMA awareness for device data caching, and IOMMU configuration.
Security: Build kernel drivers fundamentally designed to support and maintain security across host processes, physical memory spaces, and device attestation.
Debugging and Troubleshooting: Diagnose and resolve complex driver-related issues, using common kernel debugging tools and techniques (ftrace, dmesg, etc.) to identify and fix bugs.
Synchronization and Concurrency: Design and implement synchronization mechanisms to handle concurrent access to multiple accelerators.
System Validation and Testing: Develop and execute comprehensive test plans to validate driver functionality, stability, and performance in manufacturing and in general production environments.
Collaboration and Troubleshooting: Collaborate with software and hardware teams to diagnose and resolve complex system-level issues.
Representative Projects:
Develop and optimize kernel-mode drivers for new ML accelerators.
Implement and optimize memory management, including kernel memory mapping and IOMMU configurations, for high-bandwidth data transfers.
Debug and resolve complex driver-related issues impacting ML workload performance.
Develop performance benchmarks and profiling tools to analyze driver performance.
Integrate driver support for advanced features like hardware virtualization and security, including SR-IOV and VFIO.
Optimizing PCIe communication between the host and PCIe devices, using advanced equipment like PCIe analyzers.
Implement and debug power management features for PCIe devices.
Integrating ML accelerators into containerized and virtualized environments.
Implementing and optimizing para-virtualization techniques for PCIe devices.
Configure and optimize page tables for efficient memory access from the ML accelerator.
Participate in hardware-software co-design reviews across teams to optimize performance and power efficiency.
Must-Have Skills and Experience:
Proficiency in C/C++.
Strong understanding of kernel-mode driver development and debugging.
Deep understanding of operating system internals (Linux preferred).
Experience with hardware/software interfacing and device drivers.
Experience with memory management and synchronization in kernel environments.
Strong understanding of PCIe and other hardware interfaces.
Experience with device virtualization technologies, including SR-IOV and VFIO.
Strong understanding of kernel memory mapping, page table configuration, and IOMMU.
Familiarity with hardware-software co-design principles.
Proven ability to analyze complex technical problems and provide effective solutions.
Excellent communication and collaboration 1 skills.
Experience with version control systems (e.g., Git).
Experience with debugging tools (e.g., gdb, kgdb).
Nice-to-Have Skills and Experience:
Experience with GPU driver development.
Experience with CUDA, OpenCL, or other GPU programming models.
Experience with performance profiling and benchmarking tools (perf, VTune).
Knowledge of hardware virtualization techniques, including para-virtualization.
Experience with CI/CD pipelines.
Experience with Rust.
Experience with ML frameworks like Tensorflow or Pytorch.
Experience with data center orchestration technologies (Kubernetes, Docker).
Ideal Background:
Candidates with experience in developing and debugging kernel-mode drivers for GPU or other accelerator devices.
Candidates with a strong understanding of hardware/software interactions.
Candidates with experience in optimizing driver performance for demanding workloads.
Candidates with experience in ML workloads.
Candidates who have debugged complex hardware and software interactions, especially in virtualized environments.
Candidates with experience in implementing and optimizing SR-IOV and VFIO.
Candidates with in-depth knowledge of kernel memory mapping, page tables, and IOMMU.
Candidates with experience in hardware-software co-design projects.
Benefits
Full medical, dental, and vision packages, with 100% of premium covered
Housing subsidy of $2,000/month for those living within walking distance of the office
Daily lunch and dinner in our office
Relocation support for those moving to West San Jose
How we’re different
Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.
We are a fully in-person team in West San Jose, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
* Salary range is an estimate based on our AI, ML, Data Science Salary Index 💰
Tags: Architecture ASIC Design CI/CD CUDA Docker Engineering Git GPU Kubernetes Linux Machine Learning Pipelines PyTorch Research Rust Security TensorFlow Testing
Perks/benefits: Health care Relocation support
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