ASIC Silicon CAD infrastructure Engineer
Sunnyvale, CA
Meta
Giving people the power to build community and bring the world closer together
Reality Labs focuses on delivering Meta's vision through Virtual Reality (VR) and Augmented Reality (AR). The compute performance and power efficiency requirements of Virtual and Augmented Reality require custom silicon. Meta Silicon team is driving the state-of-the-art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR & MR devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistors, through architecture, to firmware, and algorithms.
Our team works on the ASIC design environment, develops design methodologies and crafts tools to streamline the design/verification of our unique Custom SOC and IP designs. This position offers the opportunity to have real impact in a dynamic and technology-focused design environment. You will be in charge of scaling our infrastructure, developing flows and frameworks used by our design community to execute the various design activities (design flow steps, quality checks, regression etc.).ASIC Silicon CAD infrastructure Engineer Responsibilities
173.000 $/year to 249.000 $/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.
Equal Employment Opportunity Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other applicable legally protected characteristics. You may view our Equal Employment Opportunity notice here.
Meta is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, fill out the Accommodations request form.
Our team works on the ASIC design environment, develops design methodologies and crafts tools to streamline the design/verification of our unique Custom SOC and IP designs. This position offers the opportunity to have real impact in a dynamic and technology-focused design environment. You will be in charge of scaling our infrastructure, developing flows and frameworks used by our design community to execute the various design activities (design flow steps, quality checks, regression etc.).ASIC Silicon CAD infrastructure Engineer Responsibilities
- Develop EDA flow and Design methodology, CAD/automation and ASIC infrastructure to help us build efficient System on Chip (SoC) and IP for our AR/MR products.
- ASIC flow development and support for Advanced technology nodes
- Internal tools development and automation to help improve productivity across ASIC design cycles.
- Design, implement, and maintain continuous integration and delivery (CI/CD) pipelines to ensure efficient and reliable build processes.
- Work with EDA vendors on new tools/technology and new features evaluation and adoption.
- Work with internal infrastructure teams on adapting Meta infrastructure to our ASIC CAD solutions
- Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
- B.S. or M.S. degree in Computer Engineering, Computer Science or Electrical Engineering or equivalent work experience.
- 8+ years of experience with ASIC EDA infrastructure (compute, storage, job scheduling) principles.
- Knowledge of front-end and back-end ASIC tools and flows.
- Experience in RTL design and DV verification test cases.
- Experience with EDA tools and scripting languages (Unix Shell, Python, TCL) used to build tools and flows for complex environments.
- Experience with developing and supporting solutions for ASIC custom design.
- Experience communicating across internal teams and with external vendors.
- Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
- 12+ years of experience with ASIC EDA Infrastructure
- Experience developing ASIC design flows from scratch with a minimum of direction.
- Experience with RTL design and verification flow methodologies
173.000 $/year to 249.000 $/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.
Equal Employment Opportunity Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other applicable legally protected characteristics. You may view our Equal Employment Opportunity notice here.
Meta is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, fill out the Accommodations request form.
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Category:
Engineering Jobs
Tags: Architecture ASIC Design CAD CI/CD Computer Science Computer Vision EDA Engineering Machine Learning Physics Pipelines Python VR
Perks/benefits: Career development Equity / stock options Health care Salary bonus Team events
Region:
North America
Country:
United States
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