ASIC Engineer, Infra Silicon Enablement
Sunnyvale, CA | Austin, TX
Meta
Giving people the power to build community and bring the world closer together
Meta is seeking an Engineer to join our Infra Silicon Enablement (ISE) team. Our servers and data centers are the foundation upon which our rapidly scaling infrastructure operates efficiently to deliver our innovative services. The ISE team is responsible for the Hardware Lifecycle of all Meta servers including pre-production hands-on system and hardware debugging and stress testing, enabling production-ready system monitoring, automated provisioning and automated remediation of issues.
ISE Engineers work closely with hardware designers, system manufacturers, component vendors, capacity engineering, production engineering, Meta services, and data center operations teams to test systems before release to our production data centers, and to track the health and lifecycle of servers in production.
The Infra Silicon squad’s primary charter is to deliver scalable and reliable custom ASIC solutions to meet Meta data center needs. Ramping to production and solving the datacenter scaling and deployment challenges requires us to take a systems based approach to Silicon bring up and validation.
As an ASIC Engineer in the Infra Silicon Enablement team, you will be part of a dynamic team working with the best in the industry, focused on developing and supporting innovative ASIC solutions for Meta’s data center applications.ASIC Engineer, Infra Silicon Enablement Responsibilities
$१,४२,०००/year to $२,०३,०००/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.
Equal Employment Opportunity Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other applicable legally protected characteristics. You may view our Equal Employment Opportunity notice here.
Meta is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, fill out the Accommodations request form.
ISE Engineers work closely with hardware designers, system manufacturers, component vendors, capacity engineering, production engineering, Meta services, and data center operations teams to test systems before release to our production data centers, and to track the health and lifecycle of servers in production.
The Infra Silicon squad’s primary charter is to deliver scalable and reliable custom ASIC solutions to meet Meta data center needs. Ramping to production and solving the datacenter scaling and deployment challenges requires us to take a systems based approach to Silicon bring up and validation.
As an ASIC Engineer in the Infra Silicon Enablement team, you will be part of a dynamic team working with the best in the industry, focused on developing and supporting innovative ASIC solutions for Meta’s data center applications.ASIC Engineer, Infra Silicon Enablement Responsibilities
- The team works on all aspects of silicon productization
- from early architecture and design inputs, to pre-silicon validation, to bring-up and post-silicon characterization.
- The team's early engagement with the design team ensures that quality and debuggability are built into the design.
- Root-cause, resolve and remediate issues with silicon related to PE/SIMT Cores
- We work directly with the verification team to enable a comprehensive pre and post silicon test plan.
- We create tests, develop bare metal operating systems and enable frameworks that will allow us to reuse and scale testing from pre-silicon platforms to many ASICs in the lab during the post silicon phase.
- Leverage technical skill set in ASIC design, bare-metal embedded Firmware development, and/or complex test development to build & execute comprehensive pre and post-silicon test plans. Develop related functional, stress testing and performance tests.
- 7+ years of experience in hands-on SW/FW/HW engineering to build systems/products for datacenter environments, consumer devices/HW, or similar
- 7+ years of experience with proven troubleshooting analytics of server/systems architecture and components
- 7+ years of experience in developing test specifications, procedures, and debug guides for test solutions.
- 7+ years of experience with some of the following modules/domains: PCIe, Networking, Flash, Memory, CPU, GPU, DRAM (DDR4/5 or HBM)
- Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
- Experience with development in Pre-Si environments(Simulation/Emulation)
- 7+ years of experience in ASIC Design, Development or Validation (Silicon bringup, validation, emulation, characterization)
- Experienced in the integration of lab tools for automated workflows
- 7+ years of experience with Linux systems and server systems management
- 7+ years of experience with some of the following modules/domains: Serdes, characterization, emulation, logic design, microarchitecture, validation, embedded programming
- 5+ years of experience with embedded systems’ architecture and components, performance optimization of algorithms, test automation, and instrument communication (oscilloscopes, analyzers, traffic generators, etc.)
- Experience in debugging tools for systems-on-chip (SoCs) - JTAG, GDB, Trace32
- Knowledge of common bus protocols such as I2C, SPI, USB, and/or PCIe.
- Experience in parallel computing (CUDA, Triton, Pytorch).
- Knowledge of ASIC design flow, ASIC prototyping flow, and similar.
- Experience with Tool Chains: VCS, Palladium, Protium, Zebu, Veloce, Cadence, Mentor, Synopsys
$१,४२,०००/year to $२,०३,०००/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.
Equal Employment Opportunity Meta is proud to be an Equal Employment Opportunity employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other applicable legally protected characteristics. You may view our Equal Employment Opportunity notice here.
Meta is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans in our job application procedures. If you need assistance or an accommodation due to a disability, fill out the Accommodations request form.
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Category:
Engineering Jobs
Tags: Architecture ASIC Design Computer Science CUDA Engineering GPU Linux Physics Prototyping PyTorch Testing VR
Perks/benefits: Career development Equity / stock options Health care Salary bonus
Region:
North America
Country:
United States
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