PhD in digital accelerator design for deep learning and neuromorphic computing

Dresden, DE, 01109

Fraunhofer-Gesellschaft

Die Fraunhofer-Gesellschaft mit Sitz in Deutschland ist eine der führenden Organisationen für anwendungsorientierte Forschung. Im Innovationsprozess spielt sie eine zentrale Rolle – mit Forschungsschwerpunkten in zukunftsrelevanten...

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Everyone is talking about artificial intelligence. But who is developing the necessary chips? We are, for example!

 

Would you like to help drive the development of a new highly efficient AI hardware platform as a doctoral student? At Fraunhofer IPMS, in collaboration with renowned German and European partners from science and industry, we are developing analog accelerators using novel non-volatile memory chips! By merging logic and memory elements, costs and the required wafer area can be minimized and, above all, energy efficiency and speed can be maximized. Specifically, in this project we are using ferroelectric memories, which can calculate AI algorithms from the field of deep learning in resistive crossbar structures with extremely low power consumption and high speed.

 

Furthermore, we investigate and develop innovative memory solutions in advanced CMOS technologies such as FDSOI. The development of integrated circuits also plays an important role in making these networked devices and their implemented sensors locally intelligent. Together with the existing diverse activities in the field of sensor platform development, the institute is currently strengthening its expertise in the areas of embedded machine learning, neuromorphic hardware and deep learning accelerators.

 

Want to get more information? Click here.

 

What you will do

  • Responsible for RTL design (VHDL, Verilog) of digital blocks and their system-level integration
  • Develop design architecture and break down requirements into functional blocks
  • Create and execute test benches for RTL and timing simulations
  • Perform formal verification of FPGA designs, including timing analysis, code coverage and coding rule checks
  • Support FPGA integration on target hardware
  • Create design documentation in compliance with internal and external normative standards
  • Write research papers for journals and conferences

 

What you bring to the table

  • Completed scientific university studies in the field of electrical engineering, electronics, communication engineering, information technology or comparable with a master's or diploma degree
  • Experience in FPGA design for different technologies and suppliers like Intel PSG (Altera), Xilinx or Lattice
  • Knowledge in synthesis and physical design tools such as design compiler and Cadence Innovus will be advance
  • Expertise in at least one area as a plus:
    • deep learning
    • hardware development
    • edge AI
    • memory technology
  • Strong problem-solving and analytical skills with the ability to lead complex design efforts
  • Quick to adapt to new technical and scientific contexts
  • Highly motivated and having a clear focus on producing high-quality scientific publications in peer-reviewed journals and presenting at international conferences
  • Good written and spoken English skills as a basis for working in an international team

 

What you can expect

We offer you an exciting and topical doctoral thesis in which you will benefit from our experienced doctoral supervision. In addition, we clearly focus on your personal and professional development. As part of our doctoral college, you can quickly network with other doctoral students and receive good tools for your doctorate through seminars and lectures. This gives you the opportunity to advance your personal career in applied research and start a career as a postdoc at our institute.

 

Additionally, we offer female scientists the opportunity to participate in our TALENTA program: a comprehensive career and development program that includes individually tailored qualification offers. You can find out more here.

 

We are convinced that appreciation and trust are the basis for satisfaction and motivation. We create a work-life-balance through flexible working time models and the possibility of mobile working, because creative and innovative ideas can arise anywhere. We also attach great importance to intensive induction training and an open and collegial working environment. Whether sports, music or team events - we offer a wide range of opportunities to pursue our own passions together and strengthen our team spirit.

 

 

 

The weekly working time is 39 hours. This position is also available on a part-time basis. The position is initially limited to 3 years. Employment as a postdoc is desired.
We value and promote the diversity of our employees' skills and therefore welcome all applications - regardless of age, gender, nationality, ethnic and social origin, religion, ideology, disability, sexual orientation and identity. Severely disabled persons are given preference in the event of equal suitability. Appointment, remuneration and social security benefits based on the public-sector collective wage agreement (TVöD). Additionally Fraunhofer may grant performance-based variable remuneration components.

With its focus on developing key technologies that are vital for the future and enabling the commercial utilization of this work by business and industry, Fraunhofer plays a central role in the innovation process. As a pioneer and catalyst for groundbreaking developments and scientific excellence, Fraunhofer helps shape society now and in the future. 

Interested? Apply online now. We look forward to getting to know you!

 

 

Contact

 

Ms. Isabell Zwinscher
Human Resources

Telephone: +49 (0)351 8823 1227

 

Mr. Dr. Thomas Kämpfe
Specialty Department

Telephone: +49 (0)351 2607 3215

 

Fraunhofer Institute for Photonic Microsystems IPMS 

www.ipms.fraunhofer.de 

 

Requisition Number: 79639                

 

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* Salary range is an estimate based on our AI, ML, Data Science Salary Index 💰

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Tags: Architecture Deep Learning Engineering FPGA Machine Learning PhD Postdoc Research Security

Perks/benefits: Career development Conferences Flex hours Team events

Region: Europe
Country: Germany

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