Power lead - High performance cores and AI/ML IPs
Santa Clara, CA, United States
ā ļø We'll shut down after Aug 1st - try fooš¦ for all jobs in tech ā ļø
SiFive
As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world.About SiFive
As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFiveās unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.
At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are.Ā Ā
Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions.Ā Solutions that will have a huge impact on people's lives; making the world a better place, one processor at a time.Ā
Are you ready?Ā Ā
To learn more about SiFiveās phenomenal success and to see why we have won theĀ GSAās prestigious Most Respected Private Company AwardĀ (for the fourth time!), check out ourĀ websiteĀ andĀ GlassdoorĀ pages.
Job Description:
Ā
Sifive is looking for hardware engineers who will be responsible for defining Low Power architecture and drive the micro architecture, design, development for Core IPs. Candidates will be collaborating across Architecture and RTL teams to establish methodologies, workflows & processes to ensure efficient Energy tracking. Responsibilities also include defining the power budget/spec for IPs, and coming up with new micro architecture initiatives, rolling up of the power numbers and maintaining the chip power dashboard for various applications. Use existing workflows to analyze Energy and make high ROI RTL modifications to improve Energy. Work with logic teams to determine the correct functionality or enhance functionality for power reduction. Select and run a wide variety of workloads for power analysis. Develop IP power model on new architecture design, providing power data for performance/power/area treads-offs. Work with multi-functional teams on improving power modeling. A diverse set of knowledge in low power architecture, micro-architecture, Design, Power Intent/implementation, power optimization and power estimation would be a huge plus.Ā Ā
Ā
Requirements
Experience in out of order core or accelerators uArch is highly desirable.Ā
Experience in leading team of engineers and driving multiple projectsĀ
Experience with power simulation and modeling. Power modeling with emulation would be a huge plus.Ā
Experience with ASIC power analysis and optimization.
Experience with script writing in Python, Perl or Tcl.
Experience with power impact at architecture, logic design, and circuit levels.
Excellent problem solving skill and ability to work in a dynamic and diverse environment.
Ā Strong organizational and communication skills as the candidate will be presenting power status to management, sales and product teams frequently.
Pay & Benefits
Consistent with SiFive values and applicable law, we provide the following information to promote pay transparency and equity. We have a market-based pay structure which varies by location. Ā Please note that the base pay range is a guideline, and our compensation range reflects the cost of labor in the U.S. geographic market based on the location of the role. Pay within these ranges varies and depends on job-related knowledge, skills, and relevant work experience.Ā
For candidates who receive and offer, the starting salary will vary based on various factors including, but not limited to, such qualifications as, skill level, competencies, and work location.Ā Ā The range provided may represent a candidate range and may not reflect the full range for an individual tenured employee.
Base Pay Range
In addition to base pay, this role may be eligible for variable/ incentive compensation and/ or equity.Ā In addition, this role is eligible for a comprehensive, competitive benefits package which may include healthcare and retirement plans, paid time off, and more!Ā
Additional Information:
This position requires a successful background and reference checks and satisfactory proof of your right to work in
United States of AmericaAny offer of employment for this position is also contingent on the Company verifying that you are a authorized for access to export-controlled technology under applicable export control laws or, if you are not already authorized, our ability to successfully obtain any necessary export license(s) or other approvals.
SiFive is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.
As an E-Verify employer, we use this system to confirm the employment eligibility of all new hires in accordance with federal law. All applicants will be required to complete a Form I-9, Employment Eligibility Verification, upon hire. We do not use E-Verify to pre-screen job candidates and will comply with all E-Verify regulations.
California residents: please see our job candidate notice for more information on how we handle your personal information and your privacy rights: Privacy Policy Document.
* Salary range is an estimate based on our AI, ML, Data Science Salary Index š°
Tags: Architecture Machine Learning Perl Privacy Python
Perks/benefits: Career development Competitive pay Equity / stock options Transparency
More jobs like this
Explore more career opportunities
Find even more open roles below ordered by popularity of job title or skills/products/technologies used.