Power UPF Methodology Engineer
Bengaluru, India
SiFive
As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world.About SiFive
As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.
At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are.
Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions. Solutions that will have a huge impact on people's lives; making the world a better place, one processor at a time.
Are you ready?
To learn more about SiFive’s phenomenal success and to see why we have won the GSA’s prestigious Most Respected Private Company Award (for the fourth time!), check out our website and Glassdoor pages.
Job Description:
Role:
As UPF power engineer, you will work with the Power Management Architect for feasibility studies. Drive UPF methodology across frontend and backend teams for power intent and verification. The person will also be responsible for supporting customers for UPF-related customer queries, working with Platform engineering teams to develop scalable solutions across various design configs.
Responsibilities
- Drive UPF/CPF implementation, power/voltage domains, and power gating methodologies and work with power management
- Work on Low power design, writing UPF, and power intent verification at chip level
- Work with ASIC design flows and methodologies, including RTL, verification, synthesis, and static timing analysis (STA).
- Work with EDA vendors and tools team to define new power methodologies, automated UPF generation, and low power analysis.
Required Skills
- 2+ years of relevant experience
- Experience with Synopsys Verdi, Verdi UPF, and synthesis UPF
- Experience with power-aware simulations VCS/NLP or equivalent
- Familiar with low power design Implementation including UPF/CPF, multi-voltage domains, power gating
- Experience with power intent definition, implementation, and verification flows.
- Strong understanding of ASIC design flows and IP design flows.
- Good scripting and programming skills in Python, Perl, or TCL languages
- Familiar with power analysis and optimization methods.
Evaluates reliability of materials, properties and techniques used in production; plans, designs and develops electronic parts, components, integrated circuitry, mechanical systems, equipment and packaging, optical systems and/or DSP systems.
Additional Information:
This position requires a successful background and reference checks and satisfactory proof of your right to work in:
IndiaAny offer of employment for this position is also contingent on the Company verifying that you are a authorized for access to export-controlled technology under applicable export control laws or, if you are not already authorized, our ability to successfully obtain any necessary export license(s) or other approvals.
SiFive is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.
* Salary range is an estimate based on our AI, ML, Data Science Salary Index 💰
Tags: ASIC Design EDA Engineering Machine Learning NLP Perl Python
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