Principal Engineer, Design Technology Co-optimization

Tasks

• Characterize library cells using characterization methodology and tools
• Collaborate with EDA partners on library optimization
• Collaborate with foundry technology development teams
• Collaborate with physical design engineers
• Drive standard cell library optimization
• Identify technology and library gaps
• Interface with foundry customers
• Optimize library circuits for performance power and area
• Run Spice circuit simulations
• Support design and verification of cells for product PPA
• Support foundation IP validation

Perks/Benefits

• Health insurance
• Hybrid work model
• Retirement plan
• Vacation time

Skills/Tech-stack

EDAIntegration | LibraryCellCharacterization | LocalLayoutEffects | MOSFETCharacterization | PhysicalDesignCollaboration | PowerPerformanceAreaAnalysis | ProcessVariability | SemiconductorTechnology | SpiceSimulation | StandardCellLibraries