Senior Principal AI Interconnect Architect
Milpitas, CA, United States
USD 163K-270K (estimate) Senior-level Full Time
Tasks
- Analyze bandwidth latency power area and reliability trade offs
- Collaborate with SoC package design and software teams for integration
- Contribute to industry specification direction
- Design switched fabrics for AI ML scale out
- Develop chip-to-chip interconnect architectures
- Develop performance models and simulations
- Participate in industry standards bodies
Perks/Benefits
- 401k plan
- Employee assistance program
- Life, accident, and disability insurance
- Medical, dental, and vision insurance
- Paid sick leave
- Paid vacation time
- Transit benefits
- Tuition reimbursement
Skills/Tech-stack
Bandwidth) | CXL | Co-Packaged Optics | Ethernet | Fabric topology | Fat Tree | Latency | Leaf Spine Clos | Leaf-spine | Meshed topologies | Modeling and Simulation | NVLink | PCIe | Performance Modeling | Power Optimization | Quality of Service | Scalability | Serial links | Software-defined networking | Switching fabrics | Torus | Transport Protocols | Ultra Ethernet
Education
Roles
AI | AI Interconnect Architect | Architect | Principal | Principal Architect
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