AI/ML ASIC Architect
Milpitas, CA, United States
USD 163K-249K (estimate) Senior-level Full Time
Tasks
- Architect accelerator components including memory and DMA
- Author architecture specifications
- Create modular I/O subsystem architectures
- Define I/O subsystem and PCIe DMA architectures
- Define hardware software firmware interactions
- Develop AI ML accelerator ASIC architecture specifications
- Develop AI storage solutions based system architecture
- Drive frontend architecture for AI ML accelerator product
- Guide pre-silicon verification and post-silicon validation
- Optimize performance through hardware and software co-optimization
- Perform LLM workload analysis and characterization
- Scope SoC requirements and analyze PPA tradeoffs
Perks/Benefits
- N/A
Skills/Tech-stack
ARM | ASIC | AXI | CUDA | CXL | Continuous batching | DMA | Emulation | Firmware | Flash Attention | GPU | HBM | Infiniband | KV cache | Microarchitecture | Mixture of Experts | Model Parallelism | NAND flash | NOC | NPU | NVLink | NVMe | PCIe | Performance Engineering | Pruning | Quantization | RDMA | RISC-V | RTL | Simulation | SoC | Speculative decoding | TPU | Transformer Architectures | UCIe | Verification | XPU
Education
Roles
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