AI/ML ASIC Architect
Milpitas, CA, United States
USD 163K-235K (estimate) Senior-level Full Time
Tasks
- Analyze AI storage frontend system architecture
- Architect memory efficient inference training systems
- Author architecture specifications
- Create modular I/O subsystem architectures
- Define I/O subsystem and PCIe DMA architectures
- Define SoC subsystem and DMA interactions
- Develop AI ML accelerator ASIC architecture
- Guide pre-silicon verification and post-silicon validation
- Optimize KV cache and Flash Attention
- Perform hardware/software co-optimization
- Scope SoC requirements and define architectural targets
Perks/Benefits
- N/A
Skills/Tech-stack
ARM | ASIC | AXI | Area analysis | Attention Mechanisms | CUDA | CXL | Cache optimization | Chunked prefill | Continuous batching | DMA | Emulation | Firmware | Flash Attention | HBM | I/O | I/O subsystem | KV cache | KV cache optimization | Microarchitecture | Mixture of Experts | Model Parallelism | NAND flash | NOC | PCIe | Performance Engineering | Power analysis | Pruning | Quantization | RTL | Simulation | SoC | Speculative decoding | Transformer Architectures | UCIe | Verification
Education
Roles
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