Senior Principal AI Interconnect Architect
Milpitas, CA, United States
USD 163K-270K (estimate) Senior-level Full Time
Tasks
- Analyze bandwidth latency power area and reliability trade offs
- Collaborate with SoC package design and software teams to integrate systems
- Design switched fabrics for AI ML scale out
- Develop chip-to-chip interconnect architectures
- Develop performance models
- Participate in industry standards bodies
Perks/Benefits
- 401k plan
- Employee assistance program
- Flexible spending account
- Health savings account
- Life insurance
- Medical/Dental/Vision insurance
- Paid sick leave
- Paid vacation
- Transit benefits
- Tuition reimbursement
Skills/Tech-stack
Bandwidth) | CXL | Co-Packaged Optics | Ethernet | Fat Tree | Latency | Leaf Spine Clos | Leaf-spine | Link Level Protocols | Meshed topologies | NVLink | PCIe | Power efficiency | Quality of Service | Reliability | Scalability | Serial links | Software-defined networking | Switched Fabrics | Torus | Transport Protocols | UALink | Ultra Ethernet
Education
Roles
AI | AI Architect | AI Interconnect Architect | Architect | Principal | Principal AI Architect
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