RTL Design Engineer, Machine Learning Accelerators
Tasks
- Design and document ASIC blocks
- Propose and develop ASIC design improvements
- Work with software teams on functionality and interfaces
Perks/Benefits
- N/A
Skills/Tech-stack
ASIC | Code review | High Performance | High-Performance Design | Learning algorithms | Low power | Low power design | Machine Learning | Machine learning algorithms | Performance design | Perl | Power design | Processor design | Python | RTL design | Refactoring | Scripting | SystemVerilog | Testing | Verilog
Education
Roles
Regions
Countries
States
Cities
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