Sr. Manager , Annapurna Labs - Cloud Scale Machine Learning Acceleration Team
Tasks
- Define clock reset architecture and CDC methodology
- Drive RTL timing DFT and physical design decisions
- Ensure on time SOC integration milestone delivery
- Establish best practices for top level integration
- Interface with architecture verification and physical design teams
- Lead SOC integration through tape outs
- Lead and grow SOC integration team
Perks/Benefits
Skills/Tech-stack
ASIC design | CDC | Clock/reset | Clock/reset architecture | DFT | Physical Design | Quality metrics | RTL | Reset architecture | SoC Architecture | System on chip | Tape-out | Timing closure | Verification
Education
N/A
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