DFT Engineer, Automotive Robotics
Tasks
- Coordinate test yield quality and safety efforts
- Define DFx strategy for multi chiplet packages
- Design DFT insertion into RTL
- Feed lessons learned into next generation SiP and test content
- Implement and verify JTAG scan compression
- Plan MBIST LBIST IST
- Run ATPG and perform test coverage analysis
- Support post silicon testing and pattern debug
- Translate system and safety requirements into DFT constraints
Perks/Benefits
- N/A
Skills/Tech-stack
ASST | ATPG | Cell-Aware | Clock gating | DFT | DFX | Delay Fault | Fault Campaigns | Fault Modeling | Gate Exhaustive | IDDQ | IST | JTAG | LBIST | Lock Up Latches | MBIST | Path Delay Fault | Path Delay) | Pattern Debug | Post-silicon | Post-silicon testing | RTL | RTL coding | Scan Anchors | Scan Compression | Silicon testing | Stuck-at | Tester Pattern Debug | Transition Fault
Education
N/A
Roles
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