SDE, MLA hardware/software co-design, Annapurna Labs Machine Learning Acceleration
Cupertino, California, USA
USD 159K-247K (estimate) Senior-level Full Time
Tasks
- Build silicon functionality
- Debug architecture algorithms and performance issues
- Develop bare-metal software
- Drive pre-silicon hardware/software co-development
- Perform multi level logic verification from IP blocks to SoCs
- Verify end to end SoC functionality
- Verify subsystem functionality and performance
Perks/Benefits
- N/A
Skills/Tech-stack
4G | 5G New Radio | ARM | Bare Metal | Debugging | Embedded Software | Formal verification | IEEE 802 | IEEE 802 11ad | New Radio | Perl | Python | RF standards | Scripting | SoC | System Testing | System on chip | WiMax
Education
Regions
Countries
States
Cities
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