Sr. Manager ASIC, Annapurna Labs - Cloud Scale Machine Learning Acceleration Team
Tasks
- Define clock reset architecture
- Drive technical decisions for RTL timing DFT physical design
- Ensure on time SOC integration milestone delivery
- Establish top level integration best practices
- Implement clock domain crossing methodology
- Interface with architecture verification and physical design stakeholders
- Lead SOC integration engineering team
- Lead SOC integration through tape outs
- Mentor and develop engineers
- Track integration quality metrics
Perks/Benefits
- 401k matching
- Adoption reimbursement
- Dental insurance
- EAP
- Flexible spending accounts
- Health insurance
- Mental health support
- Paid time off
- Parental leave
- Surrogacy reimbursement
- Vision insurance
Skills/Tech-stack
CDC | Clock Domain | Clock Domain Crossing | Clock/reset | Clock/reset architecture | DFT | Development tools | Domain crossing | High Performance | High Performance Compute | Integration Methodology | ML Accelerator | Performance optimization | Physical Design | Power Optimization | RTL | Reset architecture | SOC Development Tools | SoC | SoC Development | SoC integration | System on chip | Tape-out | Timing closure
Education
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