Analog Layout Engineer - AI/ML methodology
Bengaluru, Karnataka, India
INR 2200K-2800K (estimate) Mid-level Full Time
Tasks
- Adopt AI ML tools and flows
- Automate repetitive layout tasks
- Collaborate on post layout simulations
- Create analog IC physical layouts
- Implement matching and symmetry techniques
- Implement optimize and verify analog IC layouts
- Manage parasitic extraction
- Optimize device matching
- Perform DRC and LVS verification
- Predict parasitic effects
- Support analog design verification
Perks/Benefits
- N/A
Skills/Tech-stack
Analog IC | Analog IC Layout | Cadence Virtuoso | Clustering | DRC | Decision Trees | Device matching | EM/IR | EM/IR analysis | Graph Algorithms | Guard rings | IC layout | IR analysis | LVS | Machine Learning | Matplotlib | Neural Networks | Pandas | Parasitic Extraction | PyTorch | Python | Regression | Scikit-learn | Shielding | Symmetry | TensorFlow
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