Find jobs in AI/ML, Data Science and Big Data
8 results
for DRC
(Skill/Tech stack)
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Staff/Principal Layout Designer, AI-Optimized Memory USD 124K-244KAnalog layout | CMOS | Cadence VLE | Cadence VXL | CrosstalkMedical, dental, vision plans | Paid Holidays | Paid family leave | Paid time offSenior-level Full TimeRichardson, TX, United States14d ago
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Quantum PDK Engineer USD 98K-176KArtificial Intelligence | Automation | Cadence Skill | Cadence Virtuoso | Compact modelingSenior-level Full TimeUSA - New York - Malta, …18d ago
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Quantum PDK Engineer USD 98K-176KCadence Skill | Cadence Virtuoso | Chip Design | Compact modeling | Cryogenic electronicsSenior-level Full TimeUSA - New York - Malta, …18d ago
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Senior Manager, Embedded Memory USD 154K-236KAging Effects | Automation | BTI | Benchmarking | Bitcell DesignBonuses | Commission | Equity | Financial benefits | Medical benefitsSenior-level Full TimeHai Chau, Da Nang, Vietnam21d ago
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Quantum Design Engineer - Processors EUR 45K-45KANSYS HFSS | CI/CD | Circuit design | Cryogenic measurement | DRCFlexible work hours | Hybrid work setup | L and D budget | Offsites | Pension planMid-level Full TimeDelft R24d ago
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Analog Layout Engineer - AI/ML methodology INR 2200K-2800KAnalog IC | Analog IC Layout | Cadence Virtuoso | Clustering | DRCMid-level Full TimeBengaluru, Karnataka, India1mo ago
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VLSI Optimization Engineer (Neihu) TWD 1000K-1300KAlgorithms | Circuit design | Constraint Satisfaction | Constraint satisfaction problems | DRCMid-level Full TimeTaipei, Taipei City, Taiwan1mo ago
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Principal Design AI Engineer USD 176K-298KAnalog circuit | Analog circuit design | CI/CD | Cadence | Circuit designIncome Protection for Illness or Injury | Medical, dental, and vision plans | Paid Holidays | Paid family leave | Paid time offSenior-level Full TimeSan Jose, CA, United States1mo ago