Staff Engineer AI/ML
USA - California - Santa Clara, United States
USD 143K-275K Senior-level Full Time
Tasks
- Assist verification of RTL performance goals
- Augment vector CPU with matrix engine
- Define RISC V vector CPU core
- Design AI enabled matrix engine
- Develop RTL design features targeting power performance area timing
- Drive microarchitecture and design of CPU blocks
- Explore high performance strategies with CPU modeling team
- Partner with engineering team for timing area reliability testability power
- Perform microarchitecture development and specification
- Support functional verification and verification strategy
Perks/Benefits
- N/A
Skills/Tech-stack
Branch prediction | Cache | Datapath design | Floating point | Hardware multi threading | Instruction Decode | Instruction fetch | Instruction scheduling | Integer Processing | Load store execution | Load/store | Logic Design | Low power | Low power microarchitecture | Matrix Engine | Memory subsystem | Microarchitecture | Multi-threading | Order execution | Out-of-order | Out-of-order execution | Perl | Power Optimization | Prefetch | Python | RISC-V | RTL | Register Renaming | Reorder Buffer | SIMD | Safety and security | Safety and security microarchitecture | Scripting language | Simulation | SoC integration | Store Execution | System Verilog | Timing Analysis | VHDL | Vector Processor | Verilog | Virtualization | Waveform debugging
Education
Regions
Countries
States
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