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Sr. Manager - Static Timing Analysis, Annapurna Labs, Cloud Scale Machine Learning

Cupertino, California, USA

USD 239K-324K Senior-level Full Time

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Found 7h ago
Tasks
Perks/Benefits
Skills/Tech-stack

ASIC | Agile | Automation frameworks | BDD | C# | CDMA | CI/CD | Communication Systems | ECO flow | EDA Tools | Emulation | Git | I2C | I3C | Low power | Low power design | MATLAB | MIMO | Multiple Power Islands | OFDM | OFDMA | Physical Design | Power Islands | Power design | Power gating | PrimeTime | Python | RF Engineering | SPI | Scripting | Serial protocols | Static Timing | Static Timing Analysis | SystemC | SystemVerilog | TDD | TDMA | Tempus | Timing Analysis | Timing Constraints | UART | UVM | UVM verification | Wireless Communication | Wireless communication systems

Education

Bachelor of Engineering | Bachelor of Science

Roles

ASIC Engineer | Analysis Engineer | Design Engineer | Engineer | Physical Design Engineer | Static Timing Analysis Engineer | Timing Analysis Engineer

Regions

North America

Countries

United States

States

California, US

Cities

Cupertino, California, US

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