Senior Design Technology Co-Optimization Engineer
Tasks
- Analyze scaling and design rule variations
- Collaborate with foundries and internal teams
- Conduct Place and Route experiments
- Develop automated physical design methodologies
- Evaluate process influence on system performance
Perks/Benefits
Skills/Tech-stack
CMOS device physics | Data extraction | Design Rule Manual | Design Rule Manual interpretation | Design rule | Device physics | Manual interpretation | Physical Verification | Place and route | Power Integrity | Python | Reliability analysis | Static Timing | Static Timing Analysis | System Optimization | TCL | Timing Analysis
Education
Regions
Countries
States
Cities
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