Machine Learning SoC Architect
Sunnyvale, CA | Austin, TX | Menlo Park, CA
USD 173K-249K (estimate) Senior-level Full Time
Tasks
- Calculate computation throughput memory bandwidth latency
- Collaborate with RTL design verification firmware software teams
- Create long term silicon roadmap strategy
- Define ASIC architecture specification
- Develop simulation and emulation performance analysis
- Drive architecture definition for compute memory Network on Chip collectives debug
- Ensure end to end application performance goals
- Establish performance modeling methodology
- Evaluate performance versus area versus power tradeoffs
- Identify workloads and microbenchmarks for analysis
- Map data center workloads to heterogeneous ASICs
- Perform microarchitectural exploration
- Validate first pass functional silicon
Perks/Benefits
- N/A
Skills/Tech-stack
AI accelerators | ASIC Performance Modeling | C# | C++ | Computer Architecture | Design verification | Emulation | Firmware Development | Hardware Correlation | Hardware-software partitioning | Hardware/software | High Performance | High-Performance Computing | Machine Learning | Memory systems | Model to Hardware Correlation | Modeling Infrastructure | NOC | Network on Chip | Performance Analysis | Performance Computing | Performance Modeling | Performance Modeling Infrastructure | Performance versus Area versus Power | Power Performance Tradeoff | Power/performance | Pre-silicon | Pre-silicon simulation | PyTorch | Python | RTL | Silicon simulation | Software partitioning
Education
Regions
Countries
States
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