Silicon AI/ML DFT Engineer, TPU, Google Cloud
Bengaluru, Karnataka, India
INR 1500K-2500K (estimate) Mid-level Full Time
Tasks
- Collaborate on DFT constraints
- Conduct code review
- Define silicon test strategies
- Document DFT architecture
- Implement DFT specifications
- Insert DFT logic
- Participate in design debug
- Perform MBIST checks
- Perform scan coverage checks
- Plan SoC IP subsystem DFT
- Run RTL quality checks
- Support static timing analysis
- Verify DFT logic
Perks/Benefits
- N/A
Skills/Tech-stack
ASIC | ASIC DFT synthesis | ATE | ATPG | Analog design | Bring-up | DFT | DFT Synthesis | Fault Modeling | IP integration | MBIST | Mixed signal | Mixed signal design | Netlist | RTL | SCAN | Signal design | Silicon bring-up | Simulation | SoC | Static Timing | Static Timing Analysis | Timing Analysis | Verification
Education
N/A
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