Sr Deep Learning Hardware Engineer
Tasks
- Collaborate with cross functional teams to address AI accelerator requirements
- Create coverpoints and covergroups
- Develop System Verilog Assertions properties
- Develop checkers and scoreboards
- Develop functional and formal constraints
- Develop test plans and test cases
- Develop verification environments
- Formal verification of low power digital design blocks
- Functional verification of low power digital design blocks
- Implement bus functional models
- Implement random test generators
- Implement transactional models
- Validate coverage closure and sign off
Perks/Benefits
Skills/Tech-stack
AMBA | Assertion-based verification | Bus Functional Model | C plus plus | C# | Checkers | Continuous integration | Coverage closure | Formal verification | Functional Coverage | Git | GitLab | Memory controller | NOC | OVM | OpenCV | PyTorch | Python | Random Test | Random Test Generator | Scoreboards | Shell Scripting | SoC | System Verilog | System Verilog Assertions | SystemVerilog | TCL | TensorFlow | Test Plan | TestBench | Transactional Model | UVM | VCS | Verification environment | Verilog Assertions
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