Staff Compiler Engineer - PyTorch + Kernel DSLPLATE
San Jose, California, United States
USD 163K-253K Senior-level Full Time
Tasks
- Adapt torch compile to backend
- Build kernel DSLs
- Contribute upstream to PyTorch and Triton
- Define fusion and specialization rules
- Design tensor placement and migration
- Engage in compiler upstream review
- Implement parallelism aware lowering
- Implement placement and scheduling passes
- Lower DSLs to ISA and memory hierarchy
- Lower Inductor IR to hardware
- Optimize kernel autotuning
- Overlap compute with data movement
- Perform fusion tiling and memory planning
- Support tensor pipeline expert and sequence parallelism
Perks/Benefits
- 401k
- Adoption support stipend
- Charitable giving match
- Fertility care stipend
- Flexible work environment
- Holidays
- Medical travel support
- Medical/Dental/Vision insurance
- On demand therapy sessions
- Onsite cafe
- Onsite gym
- Paid time off
- Sick leave
- Virtual fitness classes
- Virtual vet care
Skills/Tech-stack
Autotuning | Collective Primitives | Cost Based Compilation | Custom ISA | Cutlass | Distributed Systems | Expert parallelism | Fusion | GPU Kernel | HPC | Helion | IREE | Inductor | Intermediate representation | Kernel DSL | LLVM | MLIR | Memory planning | NUMA | Performance Modeling | Pipeline parallelism | Placement | PyTorch | Python | Scheduling | Sequence parallelism | TVM | Tensor Parallelism | Tiling | Torch compile | Triton | XLA
Education
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