Senior Manager, Embedded Memory
USD 154K-236K (estimate) Senior-level Full Time
Tasks
- Allocate engineering effort and manage schedules
- Build customer ready PPA collateral
- Conduct SPICE and statistical analysis
- Conduct technical reviews and set team goals
- Coordinate with foundry partners and represent company
- Define bitcell and peripheral architecture
- Drive circuit design and physical implementation
- Establish design verification signoff methodology
- Lead and mentor memory design team
- Lead integration debug and silicon correlation
- Lead memory compiler architecture
- Lead silicon validation and test chip development
- Optimize Vmin leakage performance area yield
- Own memory portfolio technical roadmap
- Perform PPA analysis and benchmarking
- Perform root cause analysis for customer issues
- Run what if sensitivity analysis
- Support presales customer engagements
- Translate SoC requirements into compiler specifications
Perks/Benefits
Skills/Tech-stack
Aging Effects | Automation | BTI | Benchmarking | Bitcell Design | Body Bias | CDL | Corner analysis | DFT | DRC | Decoder | Dual Port RAM | EM | FastSPICE | FastScan | GDS | HCI | LEF | LIB | LVS | Leakage Modeling | Linux | Memory compiler | Monte Carlo | Monte Carlo Analysis | PPA analysis | PVT Corner Analysis | Parasitic Extraction | Perl | Power Integrity | Python | ROM | RTL modeling | Read Write Assist | Redhawk | Redundancy Repair | Register File | Reliability analysis | SCAN | SDK automation | SPICE | SRAM | Scripting | Self Timing | Sense Amplifier | TCL | Tapeout | Tessent | Testchip Correlation | VLSI Design | Verilog | Vmin Optimization | Write Driver
Education
Roles
Design Lead | Embedded Memory Design Lead | Lead | Manager | Memory Design Lead | Senior Manager
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